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External Chip Selects

 

Article updated at 28 Oct 2017
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External Chip selects are available on all Colibris. But since the PXA3xx chip select signals are generated from a CPLD instead of coming from the PXA3xx, the usage of the chip selects depend of the Colibri version.

PXA270

The chip selects are hardware signals generated directly by the PXA270 processor.

The timings for each of the 3 chip selects nCS1, nCS3 and nCS4 can be configured separately.

PXA270 nCSx PXA270 GPIO# SODIMM# Addr Space (Size) Evalboard Jumper# Evalboard nCS
nCS1 15 105 0x04000000 (64MB) X11.41 CAN_CS#
nCS3 79 107 0x0C000000 (64MB) X11.42 nEXT_CS[1]
nCS4 80 106 0x10000000 (64MB) X8.44 nEXT_CS[2]
- - (3.3V) - X11.43 nEXT_CS[0]

Please refer to the Evaluation Board schematics for more information. The mapping can be changed by removing the jumpers and adding patch wires.

PXA3xx

On the Colibri PXA3xx the chip selects are generated through an on-board CPLD.


The following information applies to Colibri PXA320 V1.2 and higher, PXA300 (XT)/310 V1.1 and higher.

CPLD nCSx SODIMM# Addr Space (Size) Evalboard Jumper# Evalboard nCS
EXT_nCS0 105 0x14000000 (32MB) X11.41 CAN_CS#
EXT_nCS1 107 0x16000000 (16MB) X11.42 nEXT_CS[1]
EXT_nCS2 106 0x17000000 (8MB) X8.44 nEXT_CS[2]
- (3.3V) - X11.43 nEXT_CS[0]


How to use EXT_nCS[2:0] on Colibri PXA3xx

Alternate Function and IO Direction

Set the GPIO's alternate function to GPIO Set the GPIO's direction to Input (This is the default state of this pins, you dont have to do this step if you didn't change one of these GPIOs before).

Configure PXA Timings and Memory Type

The following PXA registers need to be configured:

  • MSC1 (0x4A00000C)
    default value is 0x000902ec
    relevant bit fields: RDN3, RDF3, RBW3
  • CSADRCFG3 (INFTYPE, 0x4A00008C)
    default value is 0x0032c809
    relevant bit fields: ALT (must be 3), ALW (must be 1), ADDRBASE (must be 0), ADDRSPLIT (must be 8), optionally ADDRCONFIG

Configure CPLD

  • CS_CTRL register (0x17800000)
    use 16-bit accesses only!
    write 0x0001 to enable EXT_nCS0
    write 0x0002 to enable EXT_nCS1
    write 0x0004 to enable EXT_nCS2

For more information about the CPLD configuration refer to the Colibri PXA3xx CPLD Description.